The present invention relates generally to an arrangement and method for polishing a surface of a semiconductor wafer. The present invention particularly relates to an arrangement and method for polishing a surface of a semiconductor wafer which includes the use of a plurality of preassembled polishing pad assemblies which can be selectively coupled to, and decoupled from, an actuating mechanism for rotating the polishing pad assemblies.
Semiconductor integrated circuits are typically fabricated by a layering process in which several layers of material are fabricated on or in a surface of a wafer, or alternatively, on a surface of a previous layer. This fabrication process typically requires subsequent layers to be fabricated upon a smooth, planar surface of a previous layer. However, the surface topography of layers may be uneven due to an uneven topography associated with an underlying layer. As a result, a layer may need to be polished in order to present a smooth, planar surface for a subsequent processing step. For example, a layer may need to be polished prior to formation of a conductor layer or pattern on an outer surface of the layer.
In general, a semiconductor wafer may be polished to remove-high topography and surface defects such as crystal lattice damage, scratches, roughness, or embedded particles of dirt or dust. The polishing process typically is accomplished with a polishing system that includes top and bottom platens (e.g. a polishing table and a wafer carrier or holder), between which a single polishing pad and the semiconductor wafer is positioned. The platens, and thus the semiconductor wafer and the polishing pad, are moved relative to each other thereby causing material to be removed from the surface of the wafer. This polishing process is often referred to as mechanical planarization (MP) and is utilized to improve the quality and reliability of semiconductor devices. The polishing process may also involve the introduction of a chemical slurry to facilitate higher removal rates, along with the selective removal of materials fabricated on the semiconductor wafer. The polishing process continues until a desired endpoint is achieved. This polishing process is often referred to as chemical mechanical planarization or chemical mechanical polishing (CMP).
However, the above described arrangement for polishing the wafer surface suffers from several drawbacks. For example, one drawback of the above described arrangement is that material removed from the wafer surface forms a xe2x80x9cglazexe2x80x9d on the polishing pad. This glaze decreases the effectiveness of the pad in polishing the surface of the wafer. Mechanisms utilized to condition the pad surface, e.g. remove the glaze, are utilized but eventually the polishing pad wears out and must be replaced. Replacing the polishing pad requires a significant amount of time (e.g. several hours) during which the above described arrangement can not be utilized to polish semiconductor wafers. This downtime decreases the efficiency of the polishing arrangement, and thus increases the cost of manufacturing semiconductor wafers.
Thus, a continuing need exists for an arrangement and method which efficiently polishes a semiconductor device down to a desired polishing endpoint layer.
In accordance with one embodiment of the present invention there is provided an arrangement for polishing a surface of a semiconductor wafer. The arrangement includes a polishing pad assembly which has (i) a support member having a pad receiving surface and (ii) a polishing pad attached to the pad receiving surface. The arrangement also includes an actuating mechanism for rotating the polishing pad assembly when the polishing pad assembly is coupled to the actuating mechanism. The arrangement also includes a wafer carrier configured to receive and support the semiconductor wafer. The wafer carrier is positioned in an opposing relationship relative to the pad receiving surface when the polishing pad assembly is coupled to the actuating mechanism. The arrangement further includes an attachment mechanism operatively linked to the actuating mechanism. The attachment mechanism is selectively operable between (i) a coupling mode of operation and (ii) a decoupling mode of operation. When the attachment mechanism is operated in the coupling mode of operation the polishing pad assembly is (A) attached to the attachment mechanism and (B) coupled to the actuating mechanism. When the attachment mechanism is operated in the decoupling mode of operation the polishing pad assembly is (A) detached from the attachment mechanism and (B) decoupled from the actuating mechanism.
In accordance with another embodiment of the present invention there is provided a method of polishing a surface of a semiconductor wafer. The method includes (a) placing an attachment mechanism in a first coupling mode of operation such that a first polishing pad assembly which includes (i) a first support member having a first pad receiving surface and (ii) a first polishing pad attached to the first pad receiving surface is (A) attached to the attachment mechanism and (B) coupled to an actuating mechanism which is operatively linked to the attachment mechanism, (b) placing the first polishing pad in contact with the surface of the semiconductor wafer while the actuating mechanism rotates the first polishing pad assembly, (c) removing the first polishing pad from the surface of the semiconductor wafer, (d) placing the attachment mechanism in a decoupling mode of operation such that the first polishing pad assembly is (A) detached from the attachment mechanism and (B) decoupled from the actuating mechanism, and (e) placing the attachment mechanism in a second coupling mode of operation such that a second polishing pad assembly which includes (i) a second support member having a second pad receiving surface and (ii) a second polishing pad attached to the second pad receiving surface is (A) attached to the attachment mechanism and (B) coupled to the actuating mechanism.
In accordance with still another embodiment of the present invention there is provided an arrangement for polishing a semiconductor wafer supported on a wafer carrier. The arrangement includes a first polishing pad assembly which has (i) a first support member having a first pad receiving surface and (ii) a first polishing pad attached to the first pad receiving surface. The arrangement also includes a second polishing pad assembly which has (i) a second support member having a second pad receiving surface and (ii) a second polishing pad attached to the second pad receiving surface. The arrangement also includes an actuating mechanism for rotating the first polishing pad assembly or the second polishing pad assembly when the first polishing pad assembly or the second polishing pad assembly is coupled to the actuating mechanism. The arrangement further includes an attachment mechanism operatively linked to the actuating mechanism. The attachment mechanism is selectively operable between (i) a first coupling mode of operation, (ii) a second coupling mode of operation, and (iii) a decoupling mode of operation. When the attachment mechanism is operated in the first coupling mode of operation the first polishing pad assembly is (A) attached to the attachment mechanism and (B) coupled to the actuating mechanism. When the attachment mechanism is operated in the second coupling mode of operation the second polishing pad assembly is (A) attached to the attachment mechanism and (B) coupled to the actuating mechanism. When the attachment mechanism is operated in the decoupling mode of operation the first polishing pad assembly and the second polishing pad assembly are (A) detached from the attachment mechanism and (B) decoupled from the actuating mechanism.
It is an object of the present invention to provide a new and useful arrangement and method for polishing a surface of a semiconductor wafer.
It is also an object of the present invention to provide an improved arrangement and method for polishing a surface of a semiconductor wafer.
It is yet another object of the present invention to provide an efficient arrangement and method for polishing the surface of a semiconductor.
It is still another object of the present invention to provide an arrangement for polishing a semiconductor wafer which allows the process of replacing old worn polishing pads to occur simultaneously with the polishing process.
The above and other objects, features, and advantages of the present invention will become apparent from the following description and the attached drawings.